1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and in particular to a semiconductor device, such as a logic-type device of the MPU (Micro Processing Unit), as well as to a method of manufacturing the same, where contact resistance between source lines and source regions, on the one hand, and drain lines and drain regions, on the other hand, is reduced.
2. Description of the Background Art
As for contact holes opened for connecting the silicon substrate and metal lines electrically, it is desirable to make the diameters small in order to miniaturize the semiconductor device, while it is desirable to make the diameters large in order to form contacts of low resistance. Therefore, the contact hole forming technology has come to occupy an increasingly important position as the miniaturization of semiconductor devices progresses. In general, on the bottoms of the contact holes, a metal silicide film is formed with the purpose of reducing the contact resistance between the silicon substrate and the metal film. FIG. 25 is a cross sectional view of a film forming stage of an interlayer insulation film 108 made of a PSG (Phosphate Silicate Glass) film or a BPSG (Boro-Phosphate Silicate Glass) film or the like over the entire surface of the silicon substrate in a manufacturing method according to a prior art. An element isolating insulation film 102 for separating each element forming region, impurity regions 107 which become source and drain regions, a gate insulation film 103, a gate electrode 105 having side walls 106, and an interlayer insulation film 108 for covering the gate electrode and the impurity regions (the source and the drain regions) 107.
A method of manufacturing semiconductor devices up until this stage according to a prior art is as follows. First, the element isolating insulation film 102 is formed on the silicon substrate 101 and each of the element forming regions is separated. Next, a gate insulation film 103 is formed over the entire surface of the silicon substrate, then a polycrystalline silicon film 104 is formed over the entire surface of the silicon substrate, which is patterned to form the gate electrode 105. Here, though an example where a polycrystalline silicon single layer is used as a gate electrode is shown, a gate electrode of a so-called polycide structure where a metal silicide is layered on the polycrystalline silicon may be used. Next, side walls 106 are formed on the both sides of the gate electrode and the impurity regions 107 which become the source and the drain regions are formed in the silicon substrate 101 on the outside of the side walls 106. After ion implantation, heat treatment follows in order to activate implanted ion materials in the impurity regions 107. After this, as shown in FIG. 25, an interlayer insulation film 108 is formed.
Next, as shown in FIG. 26, contact holes 109 are opened at predetermined positions above the gate electrode 105 and the impurity regions. Next, a metal film 110 which becomes a contact layer and a metal film 111 which becomes a barrier layer are formed in sequence (FIG. 27). Here, the barrier layer 111 is provided in order to prevent the silicon and the metal line from reacting with each other. Then, by heat treatment, a metal silicide 112 is formed by turning the metal layer 110 of the contact layer formed on the bottom of the contact holes into a silicide through the heat treatment (FIG. 28). After that, a metal film 113 for lines of a conductive film is formed from tungsten or the like for forming lines ( FIG. 29), and the metal film for lines is etched to form metal lines 114 (FIG. 30). In FIG. 31, an enlarged view of the part C of FIG. 30 is shown. On the bottom of the contact holes 109, the metal silicide layer 112 is formed and between the metal lines 114 and the metal silicide layer 112, the barrier metal 111 is formed in order to prevent the metal lines and the silicon from reacting with each other.
The contact resistance of those contact parts are determined by the sum of the resistance of the metal lines 114, an interface resistance between the metal lines 114 and barrier layer 111, the resistance of barrier layer 111, an interface resistance between the barrier layer 111 and the metal silicide layer 112, the resistance of the metal silicide layer 112 and an interface resistance between the metal silicide layer 112 and the source and the drain regions 107. Among those factors, however, the interface resistance between the metal silicide layer 112 and the source and the drain regions is the largest compared to other resistance, and therefore this interface resistance dominates the contact resistance.
Here, the interface resistance between the metal silicide layer 112 and the source and the drain regions 107 at issue is represented by the following equation.
The interface resistance R=xcfx81/Sxe2x80x83xe2x80x83(1)
wherein xcfx81 is an interface resistivity of the interface between the metal silicide layer and the silicon substrate and S is a contact area of the interface between the metal silicide layer and the silicon substrate.
Because of the miniaturization and the higher integration of semiconductor devices which are steadily progressing year after year, the contact hole diameter is being reduced with smaller contact area S of the interface between the metal silicide layer and the silicon substrate resulting in a problem of increasing contact resistance. To solve this problem of increasing contact resistance, the following two methods can be considered based on the above described equation (1).
(A) reducing the interface resistivity xcfx81 of the interface between the silicon substrate and the metal silicide layer.
(B) expanding the contact area S of the interface between the silicon substrate and the metal silicide layer.
A prior art where the contact resistance is reduced by focusing on the expansion of the contact area of the above (B) is described. The method for expanding the contact area S is largely categorized into (a) a method of expanding the interface between the silicon substrate and the metal silicide in the direction of wafer thickness, (b) a method of expanding the interface in the direction parallel to the wafer surface, and (c) a method of increasing the interface area between the silicon substrate and the metal silicide at the bottom of the contact holes.
(a) The method of expanding the interface in the direction of the wafer thickness is the most effective method with respect to the point that the miniaturization of the semiconductor device is attained while the contact resistance can be reduced even when the hole diameter is scaled down without expanding the area of the plane of the contact portion. As an example using this method, there is a method for forming a trench in the impurity region of the semiconductor substrate followed by filling in the trench with metal or metal silicide over which a contact hole is formed (see Japanese Patent Laying-Open No. 60-187060). This method has a problem that the number of steps of the process increases because a trench forming step in the silicon substrate and a contact hole forming step are carried out separately.
As an example using the method (b) of expanding in the direction parallel to the wafer surface, there is a method of forming a metal silicide layer having broader area than that of the contact hole cross section (see Japanese Patent Laying-Open No. 8-172125). This method, however, has a shortcoming that the step of forming the metal silicide layer with broader area than that of the contact hole cross section becomes complicated, which increases the cost.
As an example using (c) the method (c) of increasing the above interface area on the contact hole bottom, there is a method of forming a micro unevenness on the contact hole bottom (see Japanese Patent Laying-Open No. 3-280532). This method has an advantage that the area S of the interface between the silicon substrate and the metal silicide can be increased without expanding the diameter of the contact hole. However, since there is a limitation to the area itself on the contact hole bottom where the unevenness is formed, there is a problem that the effect of controlling the rise of the contact resistance becomes small in the case that the contact hole diameter is scaled down.
It is an object of the present invention to provide a semiconductor device with low contact resistance of which manufacturing is easy and cost effective, to cope with the miniaturization of the semiconductor device as well as a method of manufacturing the same.
A semiconductor device according to one aspect of this invention has impurity regions formed on the main surface of the silicon substrate, an interlayer insulation film covering the impurity regions and a conductive film formed within contact holes through the interlayer insulation film over the impurity regions and on the interlayer insulation film around the contact holes. This device is also provided with a metal silicide layer which is surrounded by and contacted with the impurity regions and which has the diameter larger than that of the lower edge of the contact hole, in the impurity regions below the bottom of the contact hole. In addition, the above described metal silicide layer in this device includes an upper metal silicide layer contacting the bottom of the interlayer insulation film of the lower edge of the contact hole and an interface bordering on a lower metal silicide layer contacting the impurity regions.
The metal silicide layer of the semiconductor device according to the above described one aspect is formed along the bottom of the expanded recess formed in the impurity regions on the contact hole bottom. This enlarged recess has a diameter larger than that of the contact hole penetrated through the interlayer insulation film. Thereby, a metal CVD (Chemical Vapor Deposition) method or the like is adopted for forming a metal film which becomes the metal silicide layer to corners of the expanded recess. At this time, the metal film formed at the corners of the above expanded recess is generated not only from the bottom of the expanded recess but also from the bottom of the interlayer insulation film. The upper metal film generated from the bottom of the interlayer insulation film and the lower metal film generated from the bottom of the corners of the expanded recess grow toward the inside of the expanded recess respectively from the top and from the bottom of the expanded recess, which meet in the middle of the expanded recess to form an interface in entire corner of the expanded recess. This interface may be called a seam. On the other hand, in most expanded recesses, a metal film grows from the bottom. The metal film becomes metal silicide at the parts contacting the silicon substrate. A metal layer including a seam in the corner part is close to the parts contacting with the silicon substrate, which also becomes metal silicide.
The conductive film or the metal film formed within the contact hole and the conductive film or the metal film formed on the interlayer insulation film around the contact hole may be formed separately or may be formed together.
The above described enlarged recess is provided continuously after opening the contact hole, therefore an additional step for changing the order of processing steps of the prior art is not particularly necessary. Accordingly, the above described manufacturing method according to the present invention can be easily implemented. In this way, by forming an ohmic contact in the expanded recess which is broader than the opening part of the contact hole so as to increase the contact area, a contact of low resistance can be formed while miniaturizing the semiconductor device. The enlarged recess provided in the above described silicon substrate may be a penetrated hole, but preferably an enlarged recess in a form of a trench.
A semiconductor device according to another aspect of this invention is provided with impurity regions formed on the main surface of the silicon substrate, an interlayer insulation film covering the impurity regions, a conductive film formed within a contact hole penetrating the interlayer insulation film over the impurity regions reaching the impurity regions and on the interlayer insulation film around the contact hole, and a metal silicide layer covering the side walls and the bottom of the contact hole bottom surrounded by the impurity regions.
By the formation of the metal silicide layer in the semiconductor device according to the above described another aspect, the contact area can be increased without increasing the two-dimensional area while the miniaturization of the semiconductor device proceeds, enabling a low resistance of the contact. The above described contact hole can be formed without adding further processing steps to the previous process, as an anisotropic etching on the semiconductor substrate follows continuously to the etching of the interlayer insulation film for opening.
A semiconductor device according to still another aspect of this invention is provided with impurity regions formed on the main surface of the silicon substrate, an interlayer insulation film covering impurity regions, a conductive film formed within a contact hole penetrating the interlayer insulation film over the impurity regions and on the interlayer insulation film around the contact hole and a metal silicide layer diffusing and extending into the impurity regions from the bottom of the contact hole. Metal atoms constituting the metal silicide layer diffuse into the silicon substrate in larger amount than the Si atoms diffusing into the metal film. In the semiconductor device according to the above described still another aspect of this invention, the metal atoms constituting the above described metal silicide may be either Co or Ni.
In the semiconductor device according to the above described still another aspect, as metal atoms diffusing into the silicon substrate in larger amount than the Si atoms diffusing into the metal film at the time of heat treatment for generating silicide, for example, Co and Ni may be used. By adopting the above described metals, it becomes possible to form a metal silicide layer deeper into the impurity regions than that according to a prior art while using a conventional contact hole forming step and metal film forming step. Since the diameter of the above described metal silicide layer is expanded in the direction of the diameter so as to become larger than the diameter of the lower edge of the above described contact hole. As a result, it becomes possible to form proper contacts while miniaturizing the semiconductor device.
The method of manufacturing semiconductor devices according to one aspect of the invention includes the steps of implanting an impurity onto the main surface of the silicon substrate to form impurity regions, forming an interlayer insulation film covering the impurity regions, opening contact holes in the interlayer insulation film over the impurity regions, providing an enlarged recess with a diameter larger than that of the contact hole bottom in the impurity regions by etching the silicon substrate and forming a metal film on the contact hole bottom so as to fill in the expanded recess.
The manufacturing method according to the above described one aspect can reduce the contact resistance just by adding a simple modification to a manufacturing method according to a prior art. This method is also possible while miniaturizing the semiconductor device. It is desirable for the above described metal film not to grow only on the contact hole bottom but to grow integrally on the contact hole side walls and on the interlayer insulation film including the contact hole bottom. The above description is similarly applicable to the formation of the metal film in the following description.
In the manufacturing method of semiconductor devices according to the above described one aspect, as for the etching for providing an expanded recess onto the impurity regions either an isotropic etching or wet etching may be carried out.
By the above described etching, an enlarged recess with a diameter larger than that of the lower edge of the contact hole can be formed within the impurity regions, which can increase the contact area easily and at a low cost.
In the manufacturing method of semiconductor devices according to the above described one aspect, a metal film may be formed on the contact hole bottom so as to fill in the expanded recess using a metal CVD method.
By using the metal CVD method, a metal film can be formed so as to fill in the entire expanded recess of which outer periphery expands to the bottom of the interlayer insulation film, which can increase the contact area.
The method of manufacturing semiconductor devices according to another aspect of this invention includes the steps of implanting an impurity onto the main surface of the silicon substrate to form impurity regions, forming an interlayer insulation film covering the impurity regions, opening contact holes which penetrate the interlayer insulation film over the impurity regions and which reaches the impurity regions and forming a metal film covering the side walls and the bottom of the contact hole bottom surrounded by the impurity regions.
The configuration of the manufacturing method according to the above described another aspect can spare a broad contact area while miniaturizing the semiconductor device, and therefore it becomes possible to lower the contact resistance of the miniaturized semiconductor device.
The method of manufacturing semiconductor devices according to still another aspect of this invention includes the steps of forming impurity regions by implanting an impurity onto the main surface of the silicon substrate, forming an interlayer insulation film covering the impurity regions, opening contact holes in the interlayer insulation film above the impurity regions, forming a metal film on the bottoms of the contact holes and heat treatment for forming a metal silicide layer by causing reaction of the metal film and silicon, wherein the metal atoms forming the metal film diffuses into the silicon substrate in the amount larger than that of Si atoms diffusing into the metal layer. As for the above described metal film in the manufacturing method according to the still another aspect, a metal film of either Co or Ni may be used.
The above described metals such as Co or Ni diffuse into the silicon substrate in more amount than Si atoms diffusing into the metal film during the heat treatment step for forming metal silicide, and the metal silicide is formed in the silicon substrate from the bottom of contact holes. In this manufacturing method, the metal silicide layer is formed deeper than that of the prior art with the diameter larger than that of the lower edge of the contact holes. As a result, the conduct area is broadened so as to lower the contact resistance. This reduction of the contact resistance becomes possible by selecting materials for the metal film without a need for increase the number of steps compared to a manufacturing method according to a prior art. In addition, this reduction of the contact resistance becomes possible even when the semiconductor device is miniaturized.
In the manufacturing method of semiconductor devices according to the above described still another aspect of the invention, in the case that the metal film is a Co film, either the heat treatment below 450xc2x0 C. or the heat treatment above 600xc2x0 C. may be added as the heat treatment.
In the temperature range of 450xc2x0 C. or lower 600xc2x0 C. or higher, Co diffuses and penetrates into silicon to form a cobalt silicide. Therefore, the cobalt silicide layer is formed deep and extending wide in the impurity regions so as to increase the contact area easily, attaining lower the contact resistance. This method can be implemented only by selecting cobalt as the type of metal film without changing the processing steps, which can be easily implemented using the existing facilities.
In the method for manufacturing a silicon substrate according to the above described aspect, in the case that the metal film is a Co film, the step for selectively removing only the cobalt film followed by the heat treatment at the temperature not lower than 600xc2x0 C. may be added after the heat treatment at the temperature of not higher than 450xc2x0 C. as the heat treatment for forming the metal silicide.
In the above described method, Co2Si is formed in a position deeper than the impurity regions of silicon and then CoSi2 is formed, therefore, the contact area can be easily increased even in a semiconductor device which is attempted to be miniaturized. This method can be implemented by selecting cobalt as the type of metal film without changing the processing steps, which can be implemented easily utilizing the existing facilities.
In the method for manufacturing semiconductor devices according to the above described still another aspect, the step of selectively removing the metal film other than the metal silicide layer after the heat treatment step for forming the metal silicide layer may be further included.
By removing the above described metal film, reaction between the metal film for interconnection and silicon can be completely prevented to secure a stable interconnection system. By removing the unreacted metal film remaining on the side walls of the contact holes, it can become easier to fill in the contact holes with the metal film.
In the method for manufacturing semiconductor devices according to the above described still another aspect, the step of forming the metal film, the heat treatment step of forming the metal silicide layer and the step of selectively removing the metal film other than the metal silicide layer may be repeated a plurality of times.
By the above described repetition, the metal silicide layer is formed deeper and broader in the impurity regions, and therefore, it becomes possible to broaden the contact area and to further lower the contact resistance.